Package: TypePredHandler

TypePredHandler

name	instruction	branch	complexity	line	method
TypePredHandler(TypePredDecorator)	M: 0 C: 18 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 5 100%	M: 0 C: 1 100%
addAssert(AAssignToExpStmIR, AMetaStmIR)	M: 0 C: 22 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 5 100%	M: 0 C: 1 100%
consAsserts(AIdentifierVarExpIR)	M: 4 C: 29 88%	M: 2 C: 2 50%	M: 2 C: 1 33%	M: 2 C: 5 71%	M: 0 C: 1 100%
getAnnotator()	M: 0 C: 5 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
getDecorator()	M: 0 C: 3 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
getEncBlockStm(AVarDeclIR)	M: 31 C: 22 42%	M: 5 C: 3 38%	M: 4 C: 1 20%	M: 9 C: 6 40%	M: 0 C: 1 100%
getInfo()	M: 0 C: 6 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
getJmlGen()	M: 0 C: 4 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
getTransAssist()	M: 0 C: 6 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
getTypePredUtil()	M: 0 C: 3 100%	M: 0 C: 0 100%	M: 0 C: 1 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
handleAssign(AAssignToExpStmIR)	M: 13 C: 56 81%	M: 2 C: 6 75%	M: 2 C: 3 60%	M: 3 C: 12 80%	M: 0 C: 1 100%
handleBlock(ABlockStmIR)	M: 0 C: 83 100%	M: 0 C: 10 100%	M: 0 C: 6 100%	M: 0 C: 17 100%	M: 0 C: 1 100%
handleCallObj(ACallObjectExpStmIR)	M: 46 C: 48 51%	M: 6 C: 4 40%	M: 4 C: 2 33%	M: 9 C: 12 57%	M: 0 C: 1 100%
handleClass(ADefaultClassDeclIR)	M: 0 C: 33 100%	M: 0 C: 4 100%	M: 0 C: 3 100%	M: 0 C: 7 100%	M: 0 C: 1 100%
handleField(AFieldDeclIR)	M: 1 C: 74 99%	M: 2 C: 8 80%	M: 2 C: 4 67%	M: 1 C: 12 92%	M: 0 C: 1 100%
handleMapSeq(AMapSeqUpdateStmIR)	M: 17 C: 72 81%	M: 5 C: 5 50%	M: 5 C: 1 17%	M: 4 C: 15 79%	M: 0 C: 1 100%
handleMethod(AMethodDeclIR)	M: 2 C: 104 98%	M: 3 C: 9 75%	M: 3 C: 4 57%	M: 2 C: 21 91%	M: 0 C: 1 100%
handleReturn(AReturnStmIR)	M: 1 C: 85 99%	M: 1 C: 3 75%	M: 1 C: 2 67%	M: 1 C: 18 95%	M: 0 C: 1 100%
handleVarDecl(AVarDeclIR)	M: 4 C: 60 94%	M: 2 C: 6 75%	M: 2 C: 3 60%	M: 2 C: 11 85%	M: 0 C: 1 100%
inModuleToStringMethod(INode)	M: 2 C: 20 91%	M: 2 C: 4 67%	M: 2 C: 2 50%	M: 1 C: 6 86%	M: 0 C: 1 100%
proceed(AbstractTypeInfo)	M: 0 C: 7 100%	M: 0 C: 2 100%	M: 0 C: 2 100%	M: 0 C: 1 100%	M: 0 C: 1 100%
rightHandSideMayBeNull(SExpIR)	M: 19 C: 0 0%	M: 2 C: 0 0%	M: 2 C: 0 0%	M: 5 C: 0 0%	M: 1 C: 0 0%
treatMethod(INode)	M: 0 C: 28 100%	M: 0 C: 8 100%	M: 0 C: 5 100%	M: 0 C: 7 100%	M: 0 C: 1 100%
varMayBeNull(STypeIR)	M: 1 C: 13 93%	M: 2 C: 2 50%	M: 2 C: 1 33%	M: 0 C: 2 100%	M: 0 C: 1 100%

Coverage

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